Overview
The DVI interface uses a digital protocol in which the desired brightness of pixels is transmitted as binary data. When the display is driven at its native resolution, all it has to do is read each number and apply that brightness to the appropriate pixel. In this way, each pixel in the output buffer of the source device corresponds directly to one pixel in the display device, whereas with an analog signal the appearance of each pixel may be affected by its adjacent pixels as well as by electrical noise and other forms of analog distortion.
Previous standards such as the analog VGA were designed for CRT-based devices and thus did not use discrete time. As the analog source transmits each horizontal line of the image, it varies its output voltage to represent the desired brightness. In a CRT device, this is used to vary the intensity of the scanning beam as it moves across the screen.
However, when using digital displays (such as LCD) with analog signals (such as VGA), there is an array of discrete pixels and a single brightness value must be chosen for each. The decoder does this by sampling the voltage of the input signal at regular intervals. When the source is also a digital device (such as a computer), this can lead to distortion if the samples are not taken at the center of each pixel, and there are also problems with crosstalk.
Technical discussion
The data format used by DVI is based on the PanelLink serial format devised by the semiconductor manufacturer Silicon Image Inc. This uses Transition Minimized Differential Signalling or TMDS. A single DVI link consists of four twisted pairs of wire (red, green, blue, and clock) to transmit 24 bits per pixel. The timing of the signal almost exactly matches that of an analog video signal. The picture is transmitted line by line with blanking intervals between each line and each frame, and without packetization. No compression is used and DVI has no provision for only transmitting changed parts of the image. This means the whole frame is constantly re-transmitted.
With a single DVI link, the largest resolution possible at 60 Hz is 2.6 megapixels. The DVI connector therefore has provision for a second link, containing another set of red, green, and blue twisted pairs. When more bandwidth is required than is possible with a single link, the second link is enabled, and alternate pixels may be transmitted on each.
The DVI specification mandates a fixed single link cutoff point of 165MHz, where all display modes that require less than this must use single link mode, and all those that require more must switch to dual link mode. When both links are in use, the pixel rate on each may exceed 165MHz. The second link can also be used when more than 24bits per pixel is required, in which case it carries the least significant bits.
Like modern analog VGA connectors, the DVI connector includes pins for the display data channel, version 2 (DDC 2) that allows the graphics adapter to read the monitor s extended display identification data (EDID).
Connector
The DVI connector usually contains pins to pass the DVI-native digital video signals. In the case of dual-link systems, additional pins are provided for the second set of data signals.
The DVI connector may also incorporate pins to pass through the legacy analog signals using the VGA standard. This feature was included in order to make DVI universal, as it allows either type of monitor (analog or digital) to be operated from the same connector.
The DVI connector on a device is therefore given one of three names, depending on which signals it implements:
- DVI-D (digital only)
- DVI-A (analog only)
- DVI-I (digital & analog)
The connector also includes provision for a second data link for high resolution displays, though many devices do not implement this. In those that do, the connector is sometimes referred to as DVI-DL (dual link).
DVI is the only widespread standard that includes analog and digital transmission options in the same connector. Competing standards are exclusively digital: these include a system using low-voltage differential signalling (LVDS), known by its proprietary names FPD (for Flat-Panel Display) Link and FLATLINK; and its successors, the LVDS Display Interface (LDI) and OpenLDI.
One oversight in DVI is that USB signals were not incorporated into the connector. This has been addressed in the VESA M1-DA connector used by InFocus on their projector systems, and in the now-defunct Apple Display Connector used by Apple Computer. The VESA M1 connector is essentially the VESA Plug & Display (P&D) connector, which was itself originally named the Enhanced Video Connector (EVC). The pinout of the Apple Display Connector is electrically compatible with the VESA P&D/M1, but physically the shell of the connector is a different shape.
Some new DVD players, TV sets (including HDTV sets) and video projectors have DVI/HDCP connectors; these are physically the same as DVI connectors but transmit an encrypted signal using the HDCP protocol for copyright protection. Computers with DVI video connectors can use many DVI-equipped HDTV sets as display.
Specifications
Digital
- Minimum clock frequency: 21.76 MHz
- Maximum clock frequency in single link mode: Capped at 165 MHz (3.7 Gbit/s)
- Maximum clock frequency in dual link mode: Limited only by cable quality (more than 7.4 Gbit/s)
- Pixels per clock cycle: 1 (single link) or 2 (dual link)
- Bits per pixel: 24
- Example display modes (single link):
- HDTV (1920 × 1080) @ 60 Hz with 5% LCD blanking (131 MHz)
- UXGA (1600 × 1200) @ 60 Hz with GTF blanking (161 MHz)
- WUXGA (1920 × 1200) @ 60 Hz (154 MHz)
- SXGA (1280 × 1024) @ 85 Hz with GTF blanking (159 MHz)
- Example display modes (dual link):
- QXGA (2048 × 1536) @ 75 Hz with GTF blanking (2×170 MHz)
- HDTV (1920 × 1080) @ 85 Hz with GTF blanking (2×126 MHz)
- WQXGA (2560 × 1600) pixels (30" LCD)
- WQUXGA(3840 × 2400) @ 41 Hz
GTF (Generalized Timing Formula) is a VESA standard.
Analog
- RGB bandwidth: 400 MHz at −3 dB
Connector
Pin numbers (looking at socket):
| Pin | Name | Function |
|---|---|---|
| 1 | TMDS Data 2- | Digital red - (Link 1) |
| 2 | TMDS Data 2+ | Digital red + (Link 1) |
| 3 | TMDS Data 2/4 shield | |
| 4 | TMDS Data 4− | Digital green − (Link 2) |
| 5 | TMDS Data 4+ | Digital green + (Link 2) |
| 6 | DDC clock | |
| 7 | DDC data | |
| 8 | Analog Vertical Sync | |
| 9 | TMDS Data 1− | Digital green − (Link 1) |
| 10 | TMDS Data 1+ | Digital green + (Link 1) |
| 11 | TMDS Data 1/3 shield | |
| 12 | TMDS Data 3− | Digital blue − (Link 2) |
| 13 | TMDS Data 3+ | Digital blue + (Link 2) |
| 14 | +5V | Power for monitor when in standby |
| 15 | Ground | Return for pin 14 and analog sync |
| 16 | Hot Plug Detect | |
| 17 | TMDS data 0− | Digital blue − (Link 1) and digital sync |
| 18 | TMDS data 0+ | Digital blue + (Link 1) and digital sync |
| 19 | TMDS data 0/5 shield | |
| 20 | TMDS data 5− | Digital red − (Link 2) |
| 21 | TMDS data 5+ | Digital red + (Link 2) |
| 22 | TMDS clock shield | |
| 23 | TMDS clock+ | Digital clock + (Links 1 and 2) |
| 24 | TMDS clock− | Digital clock − (Links 1 and 2) |
| C1 | Analog Red | |
| C2 | Analog Green | |
| C3 | Analog Blue | |
| C4 | Analog Horizontal Sync | |
| C5 | Analog Ground | Return for R, G and B signals |
